Joint Meeting with IEEE Central Texas Consultant’s Network


The Saga of Semiconductor Memories over the last 50 years can be broken into 8 Segments: (1)The initial ramp of DRAMS to volume production and the integration of the SRAM memory onto the chip; (2) the Memory Wall – a struggle to make DRAMs faster and more system compatible with the logic MPU, culminating in Synchronous RAMs; (3) the birth of the non-volatile memory and evolution of the Cache Hierarchy; (4) embedded memory and the age of the single chip MCU; (5) Emerging Memories- MRAM, FeRAM, PCRAM and the end of Moore’s Law scaling; (6) the advent of Vertical Scaling. the new Moore’s law and the new technologies to enable it;(7) Intelligent Memories and the intelligent Internet of Things; (8) Artificial Intelligence on a chip.


Dr. Betty Prince, Memory Strategies International


Speaker’s Bio:

Dr. Prince is CEO of Memory Strategies International. She has worked with Texas Instruments, NV Philips, and Motorola in memory technology and marketing management, at RCA in the development of an early microprocessor, and at Fairchild in semiconductor process technology. She is the author of six books in the Semiconductor Memory area. She served as an IEEE SSCS Distinguished Lecturer from 2005 – 2011, on the Program Committees of the IEEE CICC and ITC, and was on the Technical Advisory Board of IEEE Spectrum magazine. She was active in the JEDEC Standards Organization and was the U.S. rep. to the IEC SC47A WG3 memory committee. She has served on the Technical Advisory Board of several memory companies and on the Board of Directors of Mosaid Technologies. She holds patents in the memory, processor, and interface areas. She has a B.S. cum laude and M.S. in physics and math from the University of New Mexico and the University of California, and an M.B.A. and a Ph.D. from the University of Texas with a doctoral dissertation on fractal modeling.

Date & Time:

Tuesday, October 20, 2020, 6:00 to 8:00 p.m. Central Time


Zoom Meeting




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Slides from Presentation: