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Cryogenic CMOS for Qubit Control and Readout

October 6 @ 10:00 am - 11:00 am

Scaling a fault-tolerant quantum computer to millions of qubits required for running a practical algorithm is a daunting challenge. Substantial innovation is required in qubit fabrication, integration and control. CMOS integrated circuits operating at cryogenic temperature down to 4K can offer significantly higher system integration and enable scalability for future quantum computers. Complex System-on-Chips (SoCs) with digital, analog and RF capabilities can be integrated with sufficiently low power consumption to be compatible with the requirements of dilution refrigerators. This talk gives an overview of some of the control electronics requirements for spin qubits and details the design and measured results of two Intel cryogenic SoCs (Horse Ridge 1&2) designed to operate at 4K. Speaker(s): Stefano Pellerano Ph.D., Virtual: https://events.vtools.ieee.org/m/325570